;bug (?) in avra assembler reports word address of label, ; rather than byte address... that's why you'll see low(menu*2) rather ; than low(menu). if the bug gets fixed, the code will have to change .device at90s2313 .org 0 rjmp cold ; 0x0x2 ;board initialization stuff (cold start) cold: ldi r19, 0xDF ; 223 out 0x3d, r19 ; 61 ldi r19, 0x00 ; 0 out 0x3e, r19 ; 62 cold2: sbi 0x0a, 3 ; 10 sbi 0x0a, 4 ; 10 ldi r19, 0x33 ; 51 out 0x09, r19 ; 9 warm: ldi r31, 0x05 ; 5 ldi r30, 0xEE ; 238 rcall strout ; 0x0xac rcall chrin ; 0x0xc6 rcall chrout ; 0x0xbe push r21 ldi r21, 0xd ; 13 rcall chrout ; 0x0xbe ldi r19, 0x02 ; 2 sendlf: ldi r21, 0xa ; 10 rcall chrout ; 0x0xbe dec r19 brne sendlf ; 0x0x24 pop r21 cpi r21, '2' ; 50 breq opt2 ; 0x0x4c cpi r21, '1' ; 49 breq opt1 ; 0x0x4e cpi r21, '3' ; 51 breq opt3 ; 0x0x50 cpi r21, '4' ; 52 breq opt4 ; 0x0x52 cpi r21, '6' ; 54 breq opt6 ; 0x0x54 cpi r21, '5' ; 53 breq opt5 ; 0x0x56 cpi r21, '7' ; 55 breq opt7 ; 0x0x58 rjmp warm ;display menu again opt2: rjmp rs232 ; 0x0x96 opt1: rjmp test_72ioz80 ; 0x0x62 opt3: rjmp test_adc ; 0x0xce opt4: rjmp test_eeprom ; 0x0x182 opt6: rjmp test_et_dsp8 ; 0x0x2c6 opt5: rjmp test_rtc ; 0x0x34c opt7: rjmp test_lcd ; 0x0x466 wait: sbis 0x0b, 5 ;wait till serial port ready for output rjmp wait ;... out 0x0c, r19 ;send character to host computer ret test_72ioz80: ldi r31, 0x07 ; 7 ldi r30, 0x56 ; 86 rcall strout ; 0x0xac sbi 0x0a, 7 ; 10 sei ldi r19, 0xFF ; 255 ldi r17, 0xFF ; 255 out 0x17, r17 ; 23 out 0x11, r17 ; 17 ldi r17, 0x01 ; 1 clc outr17: out 0x18, r17 ; 24 out 0x12, r17 ; 18 rcall delaysetup ; 0x0x82 adc r17, r17 rjmp outr17 ; 0x0x78 delaysetup: ldi r22, 0x10 ; 16 delay: ldi r23, 0xFF ; 255 delay2: ldi r24, 0xFF ; 255 delay3: dec r24 brne delay3 ; 0x0x88 dec r23 brne delay2 ; 0x0x86 dec r22 brne delay ; 0x0x84 ret rs232: ldi r31, high(test2 * 2) ; 7 ldi r30, low(test2 * 2) ; 0xcc rcall strout ; 0x0xac cbi 0x0a, 7 ; 10 cli rs232loop: rcall chrin ; 0x0xc6 cpi r21, 0x1B ; escape code? breq rs232done ; 0x0xaa rcall chrout ; 0x0xbe rjmp rs232loop ; 0x0xa0 rs232done: rjmp cold2 ; 0x0xa strout: lpm ;load R0 from (R30:31) and r0, r0 ;anything there? breq strout_done ;return if not strout_wait: sbis 0x0b, 5 ;skip if bit 5 in I/O register 11 is set rjmp strout_wait ;else keep waiting for it to be set out 0x0c, r0 ;send the next character adiw r30, 0x01 ;increment the pointer rjmp strout ;loop till string sent out RS232 port strout_done: ret chrout: sbis 0x0b, 5 ; 11 ; wait for port ready rjmp chrout ; 0x0xbe out 0x0c, r21 ; send character out port 12 (RS232) ret chrin: sbis 0x0b, 7 ; 11 rjmp chrin ; 0x0xc6 in r21, 0x0c ; 12 ret test_adc: ldi r31, 0x07 ; 7 ldi r30, 0xB6 ; 182 rcall strout ; 0x0xac sbi 0x0a, 7 ; 10 sei ldi r19, 0xFF ; 255 sbi 0x11, 4 ; 17 sbi 0x11, 3 ; 17 sbi 0x11, 5 ; 17 sbi 0x12, 3 ; 18 sbi 0x12, 5 ; 18 sbi 0x12, 4 ; 18 br_e6: ldi r23, 0x40 ; 64 rcall sub_138 ; 0x0x138 andi r22, 0x0F ; 15 mov r19, r22 rcall sub_176 ; 0x0x176 rcall wait ; 0x0x5a push r21 swap r21 andi r21, 0x0F ; 15 mov r19, r21 rcall sub_176 ; 0x0x176 rcall wait ; 0x0x5a pop r21 andi r21, 0x0F ; 15 mov r19, r21 rcall sub_176 ; 0x0x176 rcall wait ; 0x0x5a ldi r19, 0x20 ; 32 rcall wait ; 0x0x5a rcall wait ; 0x0x5a rcall wait ; 0x0x5a ldi r23, 0x60 ; 96 rcall sub_138 ; 0x0x138 andi r22, 0x0F ; 15 mov r19, r22 rcall sub_176 ; 0x0x176 rcall wait ; 0x0x5a push r21 swap r21 andi r21, 0x0F ; 15 mov r19, r21 rcall sub_176 ; 0x0x176 rcall wait ; 0x0x5a pop r21 andi r21, 0x0F ; 15 mov r19, r21 rcall sub_176 ; 0x0x176 rcall wait ; 0x0x5a ldi r19, 0x0D ; 13 rcall wait ; 0x0x5a rjmp br_e6 ; 0x0xe6 sub_138: eor r21, r21 eor r22, r22 ldi r20, 0x04 ; 4 ldi r19, 0x90 ; 144 or r19, r23 cbi 0x12, 3 ; 18 sbi12_4: sbi 0x12, 4 ; 18 add r19, r19 brcs cbi12_5 ; 0x0x14c cbi 0x12, 4 ; 18 cbi12_5: cbi 0x12, 5 ; 18 sbi 0x12, 5 ; 18 dec r20 brne sbi12_4 ; 0x0x144 cbi 0x11, 4 ; 17 sbi 0x12, 4 ; 18 cbi 0x12, 5 ; 18 sbi 0x12, 5 ; 18 ldi r20, 0x0C ; 12 cbi12_5_2: cbi 0x12, 5 ; 18 clc sbic 0x10, 4 ; 16 sec sbi 0x12, 5 ; 18 adc r21, r21 adc r22, r22 dec r20 brne cbi12_5_2 ; 0x0x15e sbi 0x12, 3 ; 18 sbi 0x11, 4 ; 17 ret sub_176: ldi r20, 0x30 ; 48 cpi r19, 0x0A ; 10 brcs adc_done ; 0x0x17e ldi r20, 0x36 ; 54 adc_done: add r19, r20 ret test_eeprom: ldi r31, 0x05 ; 5 ldi r30, 0x94 ; 148 rcall strout ; 0x0xac sbi 0x0a, 7 ; 10 sei ldi r19, 0xFF ; 255 sbi 0x11, 6 ; 17 sbi 0x11, 5 ; 17 sbi 0x12, 6 ; 18 sbi 0x12, 5 ; 18 ldi r19, 0x0A ; 10 rcall wait ; 0x0x5a ldi r19, 0x0D ; 13 rcall wait ; 0x0x5a ldi r31, 0x05 ; 5 ldi r30, 0x62 ; 98 br_1a2: lpm ldi r16, 0x00 ; 0 cp r0, r16 breq br_1b2 ; 0x0x1b2 mov r19, r0 rcall wait ; 0x0x5a adiw r30, 0x01 ; 1 rjmp br_1a2 ; 0x0x1a2 br_1b2: ldi r19, 0x0A ; 10 rcall wait ; 0x0x5a ldi r19, 0x0D ; 13 rcall wait ; 0x0x5a ldi r31, 0x05 ; 5 ldi r30, 0x6E ; 110 br_1be: lpm ldi r16, 0x00 ; 0 cp r0, r16 breq br_1ce ; 0x0x1ce mov r19, r0 rcall wait ; 0x0x5a adiw r30, 0x01 ; 1 rjmp br_1be ; 0x0x1be br_1ce: rcall sub_1e6 ; 0x0x1e6 rcall sub_214 ; 0x0x214 push r19 swap r19 andi r19, 0x0F ; 15 rcall sub_2a6 ; 0x0x2a6 rcall wait ; 0x0x5a pop r19 andi r19, 0x0F ; 15 rcall sub_2a6 ; 0x0x2a6 rcall wait ; 0x0x5a forever: rjmp forever ; 0x0x1e4 sub_1e6: cbi 0x12, 6 ; 18 cbi 0x12, 5 ; 18 ldi r19, 0xA0 ; 160 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_1e6 ; 0x0x1e6 ldi r19, 0x00 ; 0 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_1e6 ; 0x0x1e6 ldi r19, 0x00 ; 0 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_1e6 ; 0x0x1e6 ldi r19, 0x43 ; 67 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_1e6 ; 0x0x1e6 cbi 0x12, 6 ; 18 sbi 0x12, 5 ; 18 sbi 0x12, 6 ; 18 rcall sub_290 ; 0x0x290 ret sub_214: cbi 0x12, 6 ; 18 cbi 0x12, 5 ; 18 ldi r19, 0xA0 ; 160 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_214 ; 0x0x214 ldi r19, 0x00 ; 0 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_214 ; 0x0x214 ldi r19, 0x00 ; 0 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_214 ; 0x0x214 sbi 0x12, 5 ; 18 sbi 0x12, 6 ; 18 cbi 0x12, 6 ; 18 cbi 0x12, 5 ; 18 ldi r19, 0xA1 ; 161 rcall sub_260 ; 0x0x260 rcall sub_24e ; 0x0x24e brcs sub_214 ; 0x0x214 rcall sub_274 ; 0x0x274 sbi 0x12, 5 ; 18 sbi 0x12, 5 ; 18 cbi 0x12, 6 ; 18 sbi 0x12, 5 ; 18 sbi 0x12, 6 ; 18 ret sub_24e: cbi 0x11, 6 ; 17 sbi 0x12, 6 ; 18 sec sbi 0x12, 5 ; 18 sbis 0x10, 6 ; 16 clc cbi 0x12, 5 ; 18 sbi 0x11, 6 ; 17 ret sub_260: ldi r20, 0x08 ; 8 br_262: sbi 0x12, 6 ; 18 add r19, r19 brcs br_26a ; 0x0x26a cbi 0x12, 6 ; 18 br_26a: sbi 0x12, 5 ; 18 cbi 0x12, 5 ; 18 dec r20 brne br_262 ; 0x0x262 ret sub_274: cbi 0x11, 6 ; 17 sbi 0x12, 6 ; 18 ldi r19, 0x00 ; 0 ldi r20, 0x08 ; 8 br_27c: sbi 0x12, 5 ; 18 sec sbis 0x10, 6 ; 16 clc adc r19, r19 cbi 0x12, 5 ; 18 dec r20 brne br_27c ; 0x0x27c sbi 0x11, 6 ; 17 ret sub_290: push r26 push r27 ldi r27, 0xFF ; 255 br_296: ldi r26, 0xFF ; 255 br_298: dec r26 brne br_298 ; 0x0x298 dec r27 brne br_296 ; 0x0x296 pop r27 pop r26 ret sub_2a6: ldi r30, 0xB6 ; 182 ldi r31, 0x02 ; 2 add r30, r19 ldi r19, 0x00 ; 0 adc r31, r19 lpm mov r19, r0 ret hexadecimal: .db "0123456789ABCDEF" test_et_dsp8: ldi r31, 0x05 ; 5 ldi r30, 0xBC ; 188 rcall strout ; 0x0xac sbi 0x0a, 7 ; 10 sei ldi r19, 0xFF ; 255 sbi 0x17, 5 ; 23 sbi 0x17, 6 ; 23 sbi 0x17, 7 ; 23 sbi 0x18, 5 ; 24 sbi 0x18, 6 ; 24 cbi 0x18, 7 ; 24 rcall sub_312 ; 0x0x312 ldi r22, 0x01 ; 1 ldi r21, 0x00 ; 0 rcall sub_332 ; 0x0x332 ldi r22, 0x02 ; 2 ldi r21, 0x01 ; 1 rcall sub_332 ; 0x0x332 ldi r22, 0x03 ; 3 ldi r21, 0x02 ; 2 rcall sub_332 ; 0x0x332 ldi r22, 0x04 ; 4 ldi r21, 0x03 ; 3 rcall sub_332 ; 0x0x332 ldi r22, 0x05 ; 5 ldi r21, 0x04 ; 4 rcall sub_332 ; 0x0x332 ldi r22, 0x06 ; 6 ldi r21, 0x05 ; 5 rcall sub_332 ; 0x0x332 ldi r22, 0x07 ; 7 ldi r21, 0x06 ; 6 rcall sub_332 ; 0x0x332 ldi r22, 0x08 ; 8 ldi r21, 0x07 ; 7 rcall sub_332 ; 0x0x332 endlessly: rjmp endlessly ; 0x0x310 sub_312: ldi r22, 0x09 ; 9 ldi r21, 0xFF ; 255 rcall sub_332 ; 0x0x332 ldi r22, 0x0A ; 10 ldi r21, 0x0F ; 15 rcall sub_332 ; 0x0x332 ldi r22, 0x0B ; 11 ldi r21, 0x07 ; 7 rcall sub_332 ; 0x0x332 ldi r22, 0x0C ; 12 ldi r21, 0x01 ; 1 rcall sub_332 ; 0x0x332 ldi r22, 0x0F ; 15 ldi r21, 0x00 ; 0 rcall sub_332 ; 0x0x332 ret sub_332: cbi 0x18, 5 ; 24 ldi r20, 0x10 ; 16 br_336: cbi 0x18, 6 ; 24 add r21, r21 adc r22, r22 brcc br_340 ; 0x0x340 sbi 0x18, 6 ; 24 br_340: cbi 0x18, 7 ; 24 sbi 0x18, 7 ; 24 dec r20 brne br_336 ; 0x0x336 sbi 0x18, 5 ; 24 ret test_rtc: ldi r31, 0x05 ; 5 ldi r30, 0x0C ; 12 rcall strout ; 0x0xac sbi 0x0a, 7 ; 10 sei ldi r19, 0xFF ; 255 sbi 0x11, 6 ; 17 sbi 0x11, 5 ; 17 sbi 0x12, 6 ; 18 sbi 0x12, 5 ; 18 rcall sub_39a ; 0x0x39a br_362: ldi r25, 0x02 ; 2 br_364: rcall sub_3be ; 0x0x3be push r19 swap r19 andi r19, 0x0F ; 15 rcall sub_446 ; 0x0x446 rcall wait ; 0x0x5a pop r19 andi r19, 0x0F ; 15 rcall sub_176 ; 0x0x176 rcall wait ; 0x0x5a ldi r19, 0x3A ; 58 rcall wait ; 0x0x5a dec r25 brne br_364 ; 0x0x364 rcall sub_3be ; 0x0x3be push r19 swap r19 andi r19, 0x0F ; 15 rcall sub_446 ; 0x0x446 rcall wait ; 0x0x5a pop r19 andi r19, 0x0F ; 15 rcall sub_446 ; 0x0x446 rcall wait ; 0x0x5a ldi r19, 0x0D ; 13 rcall wait ; 0x0x5a rjmp br_362 ; 0x0x362 sub_39a: cbi 0x12, 6 ; 18 cbi 0x12, 5 ; 18 ldi r19, 0xD0 ; 208 rcall sub_402 ; 0x0x402 rcall sub_3f0 ; 0x0x3f0 brcs sub_39a ; 0x0x39a ldi r19, 0x00 ; 0 rcall sub_402 ; 0x0x402 rcall sub_3f0 ; 0x0x3f0 brcs sub_39a ; 0x0x39a ldi r19, 0x00 ; 0 rcall sub_402 ; 0x0x402 rcall sub_3f0 ; 0x0x3f0 brcs sub_39a ; 0x0x39a cbi 0x12, 6 ; 18 sbi 0x12, 5 ; 18 sbi 0x12, 6 ; 18 ret sub_3be: cbi 0x12, 6 ; 18 cbi 0x12, 5 ; 18 ldi r19, 0xD0 ; 208 rcall sub_402 ; 0x0x402 rcall sub_3f0 ; 0x0x3f0 brcs sub_3be ; 0x0x3be mov r19, r25 rcall sub_402 ; 0x0x402 rcall sub_3f0 ; 0x0x3f0 brcs sub_3be ; 0x0x3be sbi 0x12, 5 ; 18 sbi 0x12, 6 ; 18 cbi 0x12, 6 ; 18 cbi 0x12, 5 ; 18 ldi r19, 0xD1 ; 209 rcall sub_402 ; 0x0x402 rcall sub_3f0 ; 0x0x3f0 brcs sub_3be ; 0x0x3be rcall sub_416 ; 0x0x416 sbi 0x12, 5 ; 18 sbi 0x12, 5 ; 18 cbi 0x12, 6 ; 18 sbi 0x12, 5 ; 18 sbi 0x12, 6 ; 18 ret sub_3f0: cbi 0x11, 6 ; 17 sbi 0x12, 6 ; 18 sec sbi 0x12, 5 ; 18 sbis 0x10, 6 ; 16 clc cbi 0x12, 5 ; 18 sbi 0x11, 6 ; 17 ret sub_402: ldi r20, 0x08 ; 8 br_404: sbi 0x12, 6 ; 18 add r19, r19 brcs br_40c ; 0x0x40c cbi 0x12, 6 ; 18 br_40c: sbi 0x12, 5 ; 18 cbi 0x12, 5 ; 18 dec r20 brne br_404 ; 0x0x404 ret sub_416: cbi 0x11, 6 ; 17 sbi 0x12, 6 ; 18 ldi r19, 0x00 ; 0 ldi r20, 0x08 ; 8 br_41e: sbi 0x12, 5 ; 18 sec nop nop nop nop nop sbis 0x10, 6 ; 16 clc adc r19, r19 cbi 0x12, 5 ; 18 nop nop nop nop nop dec r20 brne br_41e ; 0x0x41e sbi 0x11, 6 ; 17 ret sub_446: ldi r30, 0x56 ; 86 ldi r31, 0x04 ; 4 add r30, r19 ldi r19, 0x00 ; 0 adc r31, r19 lpm mov r19, r0 ret hexagain: .db "0123456789ABCDEF" test_lcd: ldi r31, high(test7 * 2) ; 5 ldi r30, low(test7 * 2) ; 120 rcall strout ; 0x0xac sbi 0x0a, 7 ; 10 sei ldi r19, 0xFF ; 255 ldi r19, 0xFC ; 252 out 0x17, r19 ; 23 sbi 0x18, 2 ; 24 sbi 0x18, 3 ; 24 rcall sub_4d4 ; 0x0x4d4 ldi r30, 0x34 ; 52 ldi r31, 0x05 ; 5 br_480: lpm and r0, r0 breq thfo ; 0x0x48e mov r19, r0 rcall sub_490 ; 0x0x490 adiw r30, 0x01 ; 1 rjmp br_480 ; 0x0x480 thfo: rjmp thfo ; 0x0x48e sub_490: push r19 andi r19, 0xF0 ; 240 sbi 0x18, 2 ; 24 in r20, 0x18 ; 24 andi r20, 0x0F ; 15 or r19, r20 out 0x18, r19 ; 24 rcall sub_4ee ; 0x0x4ee pop r19 swap r19 andi r19, 0xF0 ; 240 in r20, 0x18 ; 24 andi r20, 0x0F ; 15 or r19, r20 out 0x18, r19 ; 24 rcall sub_4ee ; 0x0x4ee ret sub_4b2: push r19 andi r19, 0xF0 ; 240 cbi 0x18, 2 ; 24 in r20, 0x18 ; 24 andi r20, 0x0F ; 15 or r19, r20 out 0x18, r19 ; 24 rcall sub_4ee ; 0x0x4ee pop r19 swap r19 andi r19, 0xF0 ; 240 in r20, 0x18 ; 24 andi r20, 0x0F ; 15 or r19, r20 out 0x18, r19 ; 24 rcall sub_4ee ; 0x0x4ee ret sub_4d4: ldi r19, 0x33 ; 51 rcall sub_4b2 ; 0x0x4b2 ldi r19, 0x32 ; 50 rcall sub_4b2 ; 0x0x4b2 ldi r19, 0x28 ; 40 rcall sub_4b2 ; 0x0x4b2 ldi r19, 0x0C ; 12 rcall sub_4b2 ; 0x0x4b2 ldi r19, 0x06 ; 6 rcall sub_4b2 ; 0x0x4b2 ldi r19, 0x01 ; 1 rcall sub_4b2 ; 0x0x4b2 ret sub_4ee: cbi 0x18, 3 ; 24 rcall sub_4f6 ; 0x0x4f6 sbi 0x18, 3 ; 24 ret sub_4f6: push r26 push r27 ldi r27, 0x10 ; 16 br_4fc: ldi r26, 0xFF ; 255 br_4fe: dec r26 brne br_4fe ; 0x0x4fe dec r27 brne br_4fc ; 0x0x4fc pop r27 pop r26 ret ;strings .equ ff = 12 ;formfeed .equ lf = 10 ;linefeed .equ cr = 13 ;carriage return ;note how the programmer inverted the common CRLF sequence to LFCR! test5: .db ff, "CP-JRAVR V1.0", lf, cr .db "TEST RTC (DS1307) ", lf, cr, lf, cr, 0 banner: .db "CP-JRAVR V1.0 QC", cr, 0 test4: .db "TEST SERIAL EEPROM(24LC256)", 0 str562: .db "WRITE = 43 ", 0 str56e: .db "READ = ", 0 test7: .db ff, "TEST LCD By ET-JRAVR V1.0 ", 0 str594: .db ff, "CP-JRAVR V1.0", lf, cr .db "TEST EEPROM(24LC256) ", lf, cr, 0 str5bc: .db ff, "CP-JRAVR V1.0", lf, cr .db " TEST ET-SDP8 (7SEGMEBT 8Digit)", lf, cr, 0 menu: .db ff, "********* CP-JRAVR V1 *********", lf, cr, lf, cr .db " 1: Test 72IOZ80 Port.(CPU=PB,PD) ", lf, cr .db " 2: Test RS232", lf, cr .db " 3: Test ADC 1-2CH.(LTC1298)", lf, cr .db " 4: Test EEPROM (24XX256) ", lf, cr .db " 5: Test RTC (DS1307) ", lf, cr .db " 6: Test ET-DSP8 (MAX7219) ", lf, cr .db " 7: Test LCD 16x2 ", lf, cr .db lf, cr, "Press ESC if you want to exit any test program or " .db lf, cr, "hit '1 - 7' for select one test program :", 0 test1: .db ff, lf, cr, " :Test a 72IOZ80 Port is output port. ", lf, cr .db "Port B0...7 & Port D0...6 , Port D0,D1 = RX,TX ", 0 test3: .db ff, ":Test AtoD 2ch. ", lf, cr, lf, cr, 0 test2: .db ff, ":Test RS232. ", lf, cr .db "Please enter any key to echo.", lf, cr, 0 ;the following is only for binary compatibility with the PonyProg2000 e2p file .db 0xff, 0xff, 0xff, 0xff